This invention relates a liquid crystal display device, and more particularly to a technique useful for a circuit for supplying a video signal voltage to each pixel.
An active-matrix type liquid crystal display device having an active element for each pixel (for example, a thin film transistor) and switching the active elements has been used widely as a display device of a notebook personal computer or the like.
Among the active-matrix type liquid crystal display devices, a TFT (Thin Film Transistor) type liquid crystal display module has been known. In the TFT type liquid crystal display module, since a video signal voltage (a gray scale voltage) is applied to a pixel electrode via a thin film transistor (TFT), the TFT type liquid crystal display module is free from crosstalk between pixels, and therefore that the TFT type liquid crystal display module is capable of providing a multi-gray scale display without using a special driving method for preventing the crosstalk, unlike a simple matrix type liquid crystal display device.
However, when a D/A conversion which selects a gray-scale voltage corresponding to a display data in digital form is used for supplying the gray-scale voltage to a pixel electrode, problems arise that, as the number of gray scales increases, the number of bits representing a display data increases, and consequently, the scale of circuits becomes large and further the speed of operation of the circuits becomes insufficient. Further, especially in liquid crystal display devices of the driving-circuit-integrated type having driving circuits and a display section fabricated on the same substrate, the above problems are serious because they increase the area of the driving circuit section other than the useful display area.
There is a tendency for output signals from video equipment to be supplied in digital signals rather than in analog signals, and therefore there is a demand for a driving method for converting digital signals into multi-gray-scale video signal voltages by inputting digital signals into the liquid crystal display device and using a driving circuit fabricated on a liquid crystal display panel, in the liquid crystal display devices of the driving-circuit-integrated type also.
As a driving method for applying multi-gray-scale video signal voltages to each pixel so that a multi-gray-scale display can be produced by using digital signal input in the active matrix type liquid crystal display device, one method of driving is known which is disclosed in Japanese Patent Application Laid-open No. Hei 5-35200 (corresponding to U.S. Pat. No. 5,337,070).
In the method disclosed in Japanese Patent Application Laid-open No. Hei 5-35200, 2m voltage bus lines are provided, and each of gray scale voltages provided from the 2m voltage bus lines varies in a staircase fashion having 2k steps during one horizontal scanning period corresponding to one horizontal scanning line.
One of the above-mentioned 2m voltage bus lines is selected based on the high-order m bits of an n-bit display data, one of the voltage levels is selected based on the lower-order k (k=nxe2x88x92m) bits of the n-bit display data, from the gray scale voltage varying in the staircase fashion on the selected voltage bus line, and the selected voltage level is applied to a pixel electrode of a pixel.
For example, assume a case in which the display data is 3 bits (n=3), m=1, and k=2. Two voltage bus lines are provided and each voltage bus line is supplied with a gray scale voltage varying in a staircase fashion having four steps during one horizontal scanning period. A gray scale voltage on one of two voltage bus lines is selected based on the high-order 1 bit of the 3-bit display data, one voltage level is selected from the gray scale voltage varying in the staircase fashion having four steps on the selected voltage bus line, based on the lower-order 2 bits of the 3-bit display data, and the selected voltage level is applied to the pixel electrode of a pixel.
According to the driving method described in the above-mentioned Japanese Patent Application Laid-open No. Hei 5-35200, the operating speed of the circuit for applying a video signal voltage on each pixel can be reduced, variations in the video signal voltages caused by the D/A conversion are reduced over the entire display area, and the number of voltage bus lines can be reduced.
However, when the number of the gray-scale levels are increased to improve display quality, the scale of a selector circuit for selecting one of voltage levels varying in a staircase fashion is made larger, and an area occupied by the selector circuit becomes so large in incorporating it into the liquid crystal display panel, and consequently, a problem arises in that the liquid crystal display panel becomes large-sized. As a liquid crystal display device solving the above-problem, a technique for reducing the width of the selector circuit is known which is disclosed in Japanese Patent Application Laid-open No. 2000-194330.
Recently, in liquid crystal display devices, the number of gray-scale voltages has been increased further to 64 or 256. No consideration has given to a problem of an increase in length of the driving circuit for realizing 64 or more gray-scale levels in Japanese Patent Application Laid-open No. 2000-194330.
Further, in the liquid crystal display device, display resolution has been increasing, but no consideration has been given to reduction of an area where the driving circuit is fabricated, that is, that of an area occupied by the driving circuit, or the minimum required number of elements.
The present invention has been made to solve the above problems with the prior art, and provides a technique for reducing the scale of the driving circuit and thereby capable of reducing the area occupied by the circuit in the liquid crystal display device.
The above objects and novel features of the present invention will become more apparent by reference to the following detailed description taken in conjunction with the accompanying drawing.
The following explains the representative ones of the present inventions briefly.
In accordance with an embodiment of the present invention, there is provided a liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal composition sandwiched between the first substrate and the second substrate, a plurality of pixels disposed on the first substrate, a plurality of video signal lines for supplying video signal voltages to the plurality of pixels, a drive circuit adapted to be supplied with a gray-scale voltage varying periodically for outputting the video signal voltages to the plurality of video signal lines, N display data lines for supplying display data to the drive circuit, and N time control signal lines for supplying time control signals varying in synchronism with the gray-scale voltage to the drive circuit, each of the N time control signals lines being associated with one of N bits representing the time control signals in a binary system; wherein the drive circuit is provided with a voltage selector circuit for selecting voltage levels from the gray-scale voltage based upon the display data and outputting the voltage levels to the plurality of video signal lines; the voltage selector circuit includes a plurality of series combinations of processing circuits, each of the plurality of series combinations being associated with one of the plurality of video signal lines, each of the processing circuits of a respective one of the plurality of series combinations being associated both with a respective one of the N display data lines and with a respective one of the N time control signal lines, and being disposed between two adjacent ones of the N display data lines, each of the processing circuits comprises a parallel combination of a display-data-related switching element and a time-control-signal-related switching element, the display data make 2N different combinations by selecting a number of from zero to N of the display-data-related switching elements, assigning the selected number of the display-data-related switching elements to be turned OFF and turning ON the remainder of the display-data-related switching elements in each of the plurality of series combinations, each of the 2N different combinations being uniquely in synchronism with one level of the gray-scale voltage, the time control signals uniquely determine one level of the gray-scale voltage by turning ON a time-control signal-related switching element constituting the parallel combination with the turned-OFF display-data-related switching element.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal composition sandwiched between the first substrate and the second substrate, a plurality of pixels arranged in a matrix array on the first substrate, a plurality of video signal lines extending in a column direction and arranged in a row direction of the matrix array for supplying video signal voltages to the plurality of pixels, a drive circuit adapted to be supplied with a gray-scale voltage varying periodically for outputting the video signal voltages to the plurality of video signal lines, N display data lines extending in the row direction and arranged in the column direction for supplying display data to the drive circuit, and N time control signal lines extending in the row direction and arranged in the column direction for supplying time control signals varying in synchronism with the gray-scale voltage to the drive circuit; wherein the drive circuit includes a voltage selector circuit for selecting voltage levels from the gray-scale voltage based upon the display data and outputting the voltage levels to the plurality of video signal lines, a shift register for supplying timing signals to the voltage selector circuit, and a plurality of timing signal lines for supplying the timing signals from the shift register to the voltage selector circuit; the voltage selector circuit includes a plurality of series combinations of processing circuits, and a plurality of data taking-in elements for taking in the display data in synchronism with the timing signals, each of the plurality of data taking-in elements corresponding to a respective one of the processing circuits and disposed together with the respective one of the processing circuits between two adjacent ones of the N display data lines, the plurality of timing signal lines are extending from the shift register in the column direction, connected to corresponding ones of the data taking-in elements, and are made of a conductive film of a same level as that of conductive films forming control electrodes of the data taking-in elements, each of the plurality of series combinations being associated with one of the plurality of video signal lines, each of the processing circuits of a respective one of the plurality of series combinations being associated both with a respective one of the N display data lines and a respective one of the N time control signal lines, each of the processing circuits comprises a parallel combination of a display-data-related switching element and a time-control-signal-related switching element, the display data make 2N different combinations by selecting a number of from zero to N of the display-data-related switching elements, assigning the selected number of the display-data-related switching elements to be turned OFF and turning ON the remainder of the display-data-related switching elements in each of the plurality of series combinations, each of the 2N different combinations being uniquely in synchronism with one level of the gray-scale voltage, the time control signals uniquely determine one level of the gray-scale voltage by turning ON a time-control-signal-related switching elements constituting the parallel combination with the turned-OFF display-data-related switching element.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal composition sandwiched between the first substrate and the second substrate, a plurality of pixels disposed on the first substrate, a plurality of video signal lines for supplying video signal voltages to the plurality of pixels, a drive circuit adapted to be supplied with a gray-scale voltage varying periodically for outputting the video signal voltages to the plurality of video signal lines, N display data lines for supplying display data to the drive circuit, and N time control signal lines for supplying time control signals varying in synchronism with the gray-scale voltage to the drive circuit; wherein the drive circuit is provided with a voltage selector circuit for selecting voltage levels from the gray-scale voltage based upon the display data and outputting the voltage levels to the plurality of video signal lines; the voltage selector circuit includes a plurality of series combinations of processing circuits, and a plurality of output circuits for outputting the voltage levels to the plurality of video signal lines based upon an output from the plurality of the series combinations, each of the plurality of output circuits being connected in series with a corresponding one of the plurality of series combinations, each of the plurality of series combinations being associated with one of the plurality of video signal lines, each of the processing circuits of a respective one of the plurality of series combinations being associated both with a respective one of the N display data lines and with a respective one of the N time control signal lines, and disposed between two adjacent ones of the N display data lines, each of the processing circuits comprises a parallel combination of a display-data-related switching element and a time-control-signal-related switching element coupled together to form an OR circuit, the display-data make 2N different combinations by selecting a number of from zero to N of the display-data-related switching elements, assigning the selected number of the display-data-related switching elements to be turned OFF and turning ON the remainder of the display-data-related switching elements in each of the plurality of series combinations, each of the 2N different combinations being uniquely in synchronized with one level of the gray-scale voltage, and each of the plurality of output circuits is supplied with a control signal for uniquely determining one level of the gray-scale voltage corresponding to the display data when all of the processing circuits of a corresponding one of the plurality of series combinations are turned ON.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal composition sandwiched between the first substrate and the second substrate, a plurality of pixels disposed on the first substrate, a plurality of video signal lines for supplying video signal voltages to the plurality of pixels, a drive circuit adapted to be supplied with a gray-scale voltage varying periodically for outputting the video signal voltages to the plurality of video signal lines, N display data lines for supplying display data to the drive circuit, and N time control signal lines for supplying time control signals varying in synchronism with the gray-scale voltage to the drive circuit, wherein the drive circuit is provided with a voltage selector circuit for selecting voltage levels from the gray-scale voltage based upon the display data and outputting the voltage levels to the plurality of video signal lines; the voltage selector circuit includes a plurality of series combinations of processing circuits, each of the plurality of series combinations being associated with one of the plurality of video signal lines, each of the processing circuits of a respective one of the plurality of series combinations being associated both with a respective one of the N display data lines and with a respective one of the N time control signal lines, and being disposed between two adjacent ones of the N display data lines, each of the processing circuits comprises a parallel combination of a display-data-related switching element and a time-control-signal-related switching element, the time control signals make 2N different combinations by selecting a number of from zero to N of the time-control-signal-related switching elements, assigning the selected number of the time-control-signal-related switching elements to be turned OFF and turning ON the remainder of the time-control-signal-related switching elements in each of the plurality of series combinations, each of the 2N different combinations being uniquely in synchronism with one level of the gray-scale voltage, the display data uniquely determine one level of the gray-scale voltage by turning ON a display-data-related switching element constituting the parallel combination with the turned-OFF time-control-signal-related switching element.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal composition sandwiched between the first substrate and the second substrate, a plurality of pixels arranged in a matrix array on the first substrate, a plurality of video signal lines extending in a column direction and arranged in a row direction of the matrix array for supplying video signal voltages to the plurality of pixels, a drive circuit adapted to be supplied with a gray-scale voltage varying periodically for outputting the video signal voltages to the plurality of video signal lines, N display data lines extending in the row direction and arranged in the column direction for supplying display data to the drive circuit, and N time control signal lines extending in the row direction and arranged in the column direction for supplying time control signals varying in synchronism with the gray-scale voltage to the drive circuit; wherein the drive circuit includes a voltage selector circuit for selecting voltage levels from the gray-scale voltage based upon the display data and outputting the voltage levels to the plurality of video signal lines, a shift register for supplying timing signals to the voltage selector circuit, and a plurality of timing signal lines for supplying the timing signals from the shift register to the voltage selector circuit; the voltage selector circuit includes a plurality of series combinations of processing circuits, and a plurality of data taking-in elements for taking in the video signal in synchronism with the timing signals, each of the plurality of data taking-in elements corresponding to a respective one of the processing circuits and disposed together with the respective one of the processing circuits between two adjacent ones of the N display data lines, the plurality of timing signal lines are extending from the shift register in the column direction, connected to corresponding ones of the data taking-in elements, and are made of a conductive film of a same level as that of conductive films forming control electrodes of the data taking-in elements, each of the plurality of series combinations being associated with one of the plurality of video signal lines, each of the processing circuits of a respective one of the plurality of series combinations being associated both with a respective one of the N display data lines and a respective one of the N time control signal lines, each of the processing circuits comprises a parallel combination of a display-data-related switching element and a time-control-signal-related switching element, the time control signals make 2N different combinations by selecting a number of from zero to N of the time-control-signal-related switching elements, assigning the selected number of the time-control-signal-related switching elements to be turned OFF and turning ON the remainder of the time-control-signal-related switching elements in each of the plurality of series combinations, each of the 2N different combinations being uniquely in synchronism with one level of the gray-scale voltage, the display data uniquely determine one level of the gray-scale voltage by turning ON a display-data-related switching elements constituting a parallel combination with the turned-OFF time-control-signal-related switching element.
In accordance with another embodiment of the present invention, there is provided 21. A liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal composition sandwiched between the first substrate and the second substrate, a plurality of pixels disposed on the first substrate, a plurality of video signal lines for supplying video signal voltages to the plurality of pixels, a drive circuit adapted to be supplied with a gray-scale voltage varying periodically for outputting the video signal voltages to the plurality of video signal lines, N display data lines for supplying display data to the drive circuit, and N time control signal lines for supplying time control signals varying in synchronism with the gray-scale voltage to the drive circuit; wherein the drive circuit is provided with a voltage selector circuit for selecting voltage levels from the gray-scale voltage based upon the display data and outputting the voltage levels to the plurality of video signal lines; the voltage selector circuit includes a plurality of series combinations of processing circuits, and a plurality of output circuits for outputting the voltage levels to the plurality of video signal lines based upon an output from the plurality of the series combinations, each of the plurality of output circuits being connected in series with a corresponding one of the plurality of series combinations, each of the plurality of series combinations being associated with one of the plurality of video signal lines, each of the processing circuits of a respective one of the plurality of series combinations being associated both with a respective one of the N display data lines and with a respective one of the N time control signal lines, and disposed between two adjacent ones of the N display data lines, each of the processing circuits comprises a parallel combination of a display-data-related switching element and a time-control-signal-related switching element coupled together to form an OR circuit, the time control signals make 2N different combinations by selecting a number of from zero to N of the time-control-signal-related switching elements, assigning the selected number of the time-control-signal-related switching elements to be turned OFF and turning ON the remainder of the time-control-signal-related switching elements in each of the plurality of series combinations, each of the 2N different combinations being uniquely in synchronized with one level of the gray-scale voltage, and each of the plurality of output circuits is supplied with a control for uniquely determining one level of the gray-scale voltage corresponding to the display date when all of the processing circuits of a corresponding one of the plurality of series combinations are turned ON.